SH7146 Datasheet, PDF (646/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 15 A/D Converter (ADC)
15.3 Register Descriptions
The A/D converter has the following registers. For details on register addresses and register states
in each processing state, refer to section 23, List of Registers.
Table 15.2 Register Configuration
Register Name
A/D data register 0
A/D data register 2
A/D control/status register_0
A/D control register_0
A/D data register 4
A/D data register 6
A/D control/status register_1
A/D control register_1
A/D data register 8
A/D data register 9
A/D data register 10
A/D data register 11
A/D data register 12
A/D data register 13
A/D data register 14
A/D data register 15
A/D control/status register_2
A/D control register_2
A/D trigger select register_0
A/D trigger select register_1
Abbrevia-
tion
R/W Initial Value Address
Access Size
ADDR0
R
H'0000
H'FFFFC900 16
ADDR2
R
H'0000
H'FFFFC904 16
ADCSR_0 R/W H'0000
H'FFFFC910 16
ADCR_0 R/W H'0000
H'FFFFC912 16
ADDR4
R
H'0000
H'FFFFC980 16
ADDR6
R
H'0000
H'FFFFC984 16
ADCSR_1 R/W H'0000
H'FFFFC990 16
ADCR_1 R/W H'0000
H'FFFFC992 16
ADDR8
R
H'0000
H'FFFFCA00 16
ADDR9
R
H'0000
H'FFFFCA02 16
ADDR10 R
H'0000
H'FFFFCA04 16
ADDR11 R
H'0000
H'FFFFCA06 16
ADDR12 R
H'0000
H'FFFFCA08 16
ADDR13 R
H'0000
H'FFFFCA0A 16
ADDR14 R
H'0000
H'FFFFCA0C 16
ADDR15 R
H'0000
H'FFFFCA0E 16
ADCSR_2 R/W H'0000
H'FFFFCA10 16
ADCR_2 R/W H'0000
H'FFFFCA12 16
ADTSR_0 R/W H'0000
H'FFFFE890 8, 16
ADTSR_1 R/W H'0000
H'FFFFE892 8, 16
Rev. 3.00 May 17, 2007 Page 602 of 974
REJ09B0229-0300