SH7146 Datasheet, PDF (133/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Types
Illegal slot instruction
General illegal instruction
Stack State
Section 5 Exception Handling
SP →
Address of
delayed branch instruction
SR
32 bits
32 bits
SP →
Address of
general illegal instruction
SR
32 bits
32 bits
Rev. 3.00 May 17, 2007 Page 89 of 974
REJ09B0229-0300