SH7146 Datasheet, PDF (53/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 1 Overview
PB2/A16/IRQ0/POE0/TIC5VS
PB1/BREQ/TIC5W
PB0/BACK/TIC5WS
AVSS
PF15/AN15
PF14/AN14
PF13/AN13
PF12/AN12
PF11/AN11
PF10/AN10
PF9/AN9
PF8/AN8
AVCC
PF6/AN6
PF4/AN4
AVSS
PF2/AN2
PF0/AN0
AVCC
PB16/POE3
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
81
50
82
49
83
48
84
47
85
46
86
45
87
44
88
43
89
42
90
QFP-100
41
91
(Top view)
40
92
39
93
38
94
37
95
36
96
35
97
34
98
33
99
32
100
31
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
PA13/A9/SCK1
PA14/A10/RXD1
PA15/CK/TXD1
PD0/D0/RXD0
PD1/D1/TXD0
PD2/D2/SCK0
VSS
PD3/D3/RXD1
VCC
PD4/D4/IRQ0/TXD1
PD5/D5/IRQ1/SCK1
PD6/D6/IRQ2/RXD2
PD7/D7/IRQ3/TXD2
PD8/D8/SCK2/AUDATA0*⁴
PD9/D9/AUDATA1*⁴
PD10/D10/AUDATA2*⁴
PD11/D11/AUDATA3*⁴
PD12/D12
PD13/D13
PD14/D14/AUDCK*⁴
Notes: 1. Fixed to VSS in the masked ROM version, and used as the FWE input pin in the F-ZTAT version.
2. A pin for the E10A emulator. Fixed to VCC in the masked ROM version, and used as the ASEMD0 input pin in the F-ZTAT version.
3. This pin function is available only in the F-ZTAT version. (Not available in the masked ROM version.)
4. This pin function is available only in F-ZTAT version supporting full functions of E10A.
(Not available in the normal F-ZTAT version and the masked ROM version.)
Figure 1.4 Pin Assignments of SH7149 (QFP Version)
Rev. 3.00 May 17, 2007 Page 9 of 974
REJ09B0229-0300