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SH7146 Datasheet, PDF (721/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family
Section 17 Pin Function Controller (PFC)
Initial
Bit
Bit Name Value R/W Description
3

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
2
PB4MD2 0
R/W PB4 Mode
1
PB4MD1 0
R/W Select the function of the
0
PB4MD0 0
R/W PB4/A18/IRQ2/POE4/TIC5US pin.
000: PB4 I/O (port)
001: IRQ2 input (INTC)
011: TIC5US input (MTU2S)
101: A18 output (BSC)*
111: POE4 input (POE)
Other than above: Setting prohibited
Note: * This function is enabled only in the on-chip ROM enabled/disabled external-extension
mode. Do not set 1 in single-chip mode.
• Port B Control Register L1 (PBCRL1)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
PB3 PB3 PB3
MD2 MD1 MD0
-
PB2 PB2 PB2
MD2 MD1 MD0
-
PB1 PB1 PB1
MD2 MD1 MD0
-
PB0 PB0 PB0
MD2 MD1 MD0
Initial value: 0 0*1 0 0*1 0 0*1 0 0*1 0
0
0
0
0
0
0
0
R/W: R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
Note: 1. The initial value is 1 in the on-chip ROM disabled external-extension mode.
Initial
Bit
Bit Name Value R/W Description
15

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
14
PB3MD2
0*1
R/W PB3 Mode
13
PB3MD1 0
R/W Select the function of the PB3/A17/IRQ1/POE1/TIC5V
12
PB3MD0
0*1
R/W pin.
000: PB3 I/O (port)
001: IRQ1 input (INTC)
010: POE1 input (POE)
011: TIC5V input (MTU2)
101: A17 output (BSC)*2
Other than above: Setting prohibited
Rev. 3.00 May 17, 2007 Page 677 of 974
REJ09B0229-0300