SH7146 Datasheet, PDF (28/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Figure 10.22 Cascaded Operation Example (b).......................................................................... 337
Figure 10.23 Cascaded Operation Example (c) .......................................................................... 338
Figure 10.24 Cascaded Operation Example (d).......................................................................... 339
Figure 10.25 Example of PWM Mode Setting Procedure .......................................................... 342
Figure 10.26 Example of PWM Mode Operation (1) ................................................................. 343
Figure 10.27 Example of PWM Mode Operation (2) ................................................................. 343
Figure 10.28 Example of PWM Mode Operation (3) ................................................................. 344
Figure 10.29 Example of Phase Counting Mode Setting Procedure........................................... 345
Figure 10.30 Example of Phase Counting Mode 1 Operation .................................................... 346
Figure 10.31 Example of Phase Counting Mode 2 Operation .................................................... 347
Figure 10.32 Example of Phase Counting Mode 3 Operation .................................................... 348
Figure 10.33 Example of Phase Counting Mode 4 Operation .................................................... 349
Figure 10.34 Phase Counting Mode Application Example......................................................... 351
Figure 10.35 Procedure for Selecting Reset-Synchronized PWM Mode.................................... 353
Figure 10.36 Reset-Synchronized PWM Mode Operation Example
(When TOCR’s OLSN = 1 and OLSP = 1) ........................................................... 354
Figure 10.37 Block Diagram of Channels 3 and 4 in Complementary PWM Mode .................. 357
Figure 10.38 Example of Complementary PWM Mode Setting Procedure................................ 358
Figure 10.39 Complementary PWM Mode Counter Operation.................................................. 359
Figure 10.40 Example of Complementary PWM Mode Operation ............................................ 361
Figure 10.41 Example of Operation without Dead Time............................................................ 364
Figure 10.42 Example of PWM Cycle Updating........................................................................ 365
Figure 10.43 Example of Data Update in Complementary PWM Mode .................................... 367
Figure 10.44 Example of Initial Output in Complementary PWM Mode (1)............................. 368
Figure 10.45 Example of Initial Output in Complementary PWM Mode (2)............................. 369
Figure 10.46 Example of Complementary PWM Mode Waveform Output (1) ......................... 371
Figure 10.47 Example of Complementary PWM Mode Waveform Output (2) ......................... 371
Figure 10.48 Example of Complementary PWM Mode Waveform Output (3) ......................... 372
Figure 10.49 Example of Complementary PWM Mode 0% and 100%
Waveform Output (1) ............................................................................................ 372
Figure 10.50 Example of Complementary PWM Mode 0% and 100%
Waveform Output (2) ............................................................................................ 373
Figure 10.51 Example of Complementary PWM Mode 0% and 100%
Waveform Output (3) ............................................................................................ 373
Figure 10.52 Example of Complementary PWM Mode 0% and 100%
Waveform Output (4) ............................................................................................ 374
Figure 10.53 Example of Complementary PWM Mode 0% and 100%
Waveform Output (5) ............................................................................................ 374
Figure 10.54 Example of Toggle Output Waveform Synchronized with PWM Output............. 375
Figure 10.55 Counter Clearing Synchronized with Another Channel ........................................ 376
Rev. 3.00 May 17, 2007 Page xxviii of xliv