SH7146 Datasheet, PDF (142/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Interrupt Controller (INTC)
6.3.2 IRQ Control Register (IRQCR)
IRQCR is a 16-bit register that sets the input signal detection mode of the external interrupt input
pins IRQ0 to IRQ3.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
- IRQ31S IRQ30S IRQ21S IRQ20S IRQ11S IRQ10S IRQ01S IRQ00S
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W
Bit
15 to 8
Bit Name

Initial
Value
All 0
7
IRQ31S 0
6
IRQ30S 0
5
IRQ21S 0
4
IRQ20S 0
R/W Description
R
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W IRQ3 Sense Select
R/W Set the interrupt request detection mode for pin IRQ3.
00: Interrupt request is detected at the low level of pin
IRQ3
01: Interrupt request is detected at the falling edge of
pin IRQ3
10: Interrupt request is detected at the rising edge of
pin IRQ3
11: Interrupt request is detected at both the falling and
rising edges of pin IRQ3
R/W IRQ2 Sense Select
R/W Set the interrupt request detection mode for pin IRQ2.
00: Interrupt request is detected at the low level of pin
IRQ2
01: Interrupt request is detected at the falling edge of
pin IRQ2
10: Interrupt request is detected at the rising edge of
pin IRQ2
11: Interrupt request is detected at both the falling and
rising edges of pin IRQ2
Rev. 3.00 May 17, 2007 Page 98 of 974
REJ09B0229-0300