SH7146 Datasheet, PDF (471/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Timing for Counter Clearing by Compare Match/Input Capture: Figures 10.100 and 10.101
show the timing when counter clearing on compare match is specified, and figure 10.102 shows
the timing when counter clearing on input capture is specified.
MPφ
Compare
match signal
Counter
clear signal
TCNT
N
H'0000
TGR
N
Figure 10.100 Counter Clear Timing (Compare Match) (Channels 0 to 4)
MPφ
Compare
match signal
Counter
clear signal
TCNT
N-1
H'0000
TGR
N
Figure 10.101 Counter Clear Timing (Compare Match) (Channel 5)
Rev. 3.00 May 17, 2007 Page 427 of 974
REJ09B0229-0300