SH7146 Datasheet, PDF (127/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 5 Exception Handling
5.4 Interrupts
5.4.1 Interrupt Sources
Table 5.7 shows the sources that start the interrupt exception handling. They are NMI, user break,
IRQ, and on-chip peripheral modules.
Table 5.7 Interrupt Sources
Type
NMI
User break
IRQ
On-chip peripheral module
Request Source
NMI pin (external input)
User break controller (UBC)
IRQ0 to IRQ3 pins (external input)
Multi-function timer pulse unit 2 (MTU2)
Multi-function timer pulse unit 2S (MTU2S)
Data transfer controller (DTC)
Watchdog timer (WDT)
A/D converter (A/D_0, A/D_1, and A/D_2)
Compare match timer (CMT_0 and CMT_1)
Serial communication interface (SCI_0, SCI_1,
and SCI_2)
Port output enable (POE)
Number of
Sources
1
1
4
28
13
1
1
3
2
12
3
All interrupt sources are given different vector numbers and vector table address offsets. For
details on vector numbers and vector table address offsets, see table 6.3 in section 6, Interrupt
Controller (INTC).
Rev. 3.00 May 17, 2007 Page 83 of 974
REJ09B0229-0300