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SH7146 Datasheet, PDF (41/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family
Section 14 Serial Communication Interface (SCI)
Table 14.1 Pin Configuration.................................................................................................. 527
Table 14.2 Register Configuration.......................................................................................... 528
Table 14.3 SCSMR Settings ................................................................................................... 546
Table 14.4 Bit Rates and SCBRR Settings in Asynchronous Mode (1) ................................. 547
Table 14.5 Bit Rates and SCBRR Settings in Asynchronous Mode (2) ................................. 548
Table 14.6 Bit Rates and SCBRR Settings in Asynchronous Mode (3) ................................. 549
Table 14.7 Bit Rates and SCBRR Settings in Clock Synchronous Mode (1) ......................... 550
Table 14.8 Bit Rates and SCBRR Settings in Clock Synchronous Mode (2) ......................... 551
Table 14.9 Bit Rates and SCBRR Settings in Clock Synchronous Mode (3) ......................... 552
Table 14.10 Maximum Bit Rates for Various Frequencies with Baud Rate Generator
(Asynchronous Mode)....................................................................................... 553
Table 14.11 Maximum Bit Rates with External Clock Input (Asynchronous Mode) ........... 554
Table 14.12 Maximum Bit Rates with External Clock Input
(Clock Synchronous Mode) .............................................................................. 555
Table 14.13 SCSMR Settings and SCI Communication Formats......................................... 557
Table 14.14 SCSMR and SCSCR Settings and SCI Clock Source Selection ....................... 557
Table 14.15 Serial Transfer Formats (Asynchronous Mode)................................................ 559
Table 14.16 Receive Errors and Error Conditions ................................................................ 567
Table 14.17 SCI Interrupt Sources........................................................................................ 583
Table 14.18 SCSSR Status Flag Values and Transfer of Received Data.............................. 586
Section 15 A/D Converter (ADC)
Table 15.1 Pin Configuration.................................................................................................. 593
Table 15.2 Register Configuration.......................................................................................... 594
Table 15.3 Channel Select List ............................................................................................... 600
Table 15.4 A/D Conversion Time (Single Mode)................................................................... 610
Table 15.5 A/D Conversion Time (Scan Mode) ..................................................................... 610
Table 15.6 A/D Converter Interrupt Source............................................................................ 612
Table 15.7 Analog Pin Specifications..................................................................................... 618
Section 16 Compare Match Timer (CMT)
Table 16.1 Register Configuration.......................................................................................... 620
Section 17 Pin Function Controller (PFC)
Table 17.1 SH7146 Multiplexed Pins (Port A)....................................................................... 629
Table 17.2 SH7149 Multiplexed Pins (Port A)....................................................................... 630
Table 17.3 SH7146 Multiplexed Pins (Port B) ....................................................................... 630
Table 17.4 SH7149 Multiplexed Pins (Port B) ....................................................................... 631
Table 17.5 SH7149 Multiplexed Pins (Port D)....................................................................... 631
Table 17.6 SH7146 Multiplexed Pins (Port E) ....................................................................... 632
Rev. 3.00 May 17, 2007 Page xli of xliv