SH7146 Datasheet, PDF (706/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 17 Pin Function Controller (PFC)
• Port A Control Register L1 (PACRL1)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
PA3 PA3 PA3
MD2 MD1 MD0
-
PA2 PA2 PA2
MD2 MD1 MD0
-
PA1 PA1 PA1
MD2 MD1 MD0
-
PA0 PA0 PA0
MD2 MD1 MD0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
15

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
14
PA3MD2 0
R/W PA3 Mode
13
PA3MD1 0
R/W Select the function of the PA3/IRQ1/RXD1 pin.
12
PA3MD0 0
R/W 000: PA3 I/O (port)
001: RXD1 input (SCI)
111: IRQ1 input (INTC)
Other than above: Setting prohibited
11

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
10
PA2MD2 0
9
PA2MD1 0
R/W PA2 Mode
R/W Select the function of the PA2/IRQ0/POE2/SCK0 pin.
8
PA2MD0 0
R/W 000: PA2 I/O (port)
001: SCK0 I/O (SCI)
011: IRQ0 input (INTC)
111: POE2 input (POE)
Other than above: Setting prohibited
7

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
6
PA1MD2 0
R/W PA1 Mode
5
PA1MD1 0
R/W Select the function of the PA1/POE1/TXD0 pin.
4
PA1MD0 0
R/W 000: PA1 I/O (port)
001: TXD0 output (SCI)
111: POE1 input (POE)
Other than above: Setting prohibited
Rev. 3.00 May 17, 2007 Page 662 of 974
REJ09B0229-0300