SH7146 Datasheet, PDF (817/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 19 Flash Memory
Start in boot mode
(reset in boot mode)
2. ^{Wait for inquiry/selection}
command
(Bit rate matching)
Reception of H'00, …, H'00
Reception ^{of H'55}
Reception of
inquiry/selection command
Response to
inquiry/selection command
Bit rate matching
1.
Execute processing
in response to inquiry/
selection command
Erasure of entire
3. user MAT and
user boot MAT
Wait for
4. ^{programming/erasure}
command
Reception of
read/check command
Response to command
Execute processing
in response to read/
check command
Erasure complete
Reception of erasure
select command
Erasure block specification
Programming
complete
Reception of programming
select command
Wait for erasure
block number
Wait for
programming data
Transmission of programming
data by the host
Figure 19.8 State Transitions in Boot Mode
Rev. 3.00 May 17, 2007 Page 773 of 974
REJ09B0229-0300