SH7146 Datasheet, PDF (776/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 18 I/O Ports
Initial
Bit
Bit Name Value R/W Description
15
PF15DR Pin state R
See table 18.10.
14
PF14DR Pin state R
13
PF13DR Pin state R
12
PF12DR Pin state R
11
PF11DR Pin state R
10
PF10DR Pin state R
9
PF9DR Pin state R
8
PF8DR Pin state R
7

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
6
PF6DR Pin state R
See table 18.10.
5

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
4
PF4DR Pin state R
See table 18.10.
3

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
2
PF2DR Pin state R
See table 18.10.
1

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
0
PF0DR Pin state R
See table 18.10.
Table 18.10 Port F Data Register L (PFDRL) Read/Write Operations
• PFDRL Bits 15 to 0
Pin Function
General input
ANn input (analog input)
Read
Pin state
1
Write
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Rev. 3.00 May 17, 2007 Page 732 of 974
REJ09B0229-0300