SH7146 Datasheet, PDF (662/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 15 A/D Converter (ADC)
A/D conversion time (t_CONV)
A/D conversion start Analog input
delay time(tD) sampling time(tSPL)
Write cycle
A/D synchronization time
(2 states) (Up to 6 states)
Pφ
Address
Internal write
signal
Analog input
sampling
signal
A/D converter
ADST write timing
Idle state
Sample-and-hold A/D conversion
ADF
End of A/D conversion
Figure 15.2 A/D Conversion Timing
Rev. 3.00 May 17, 2007 Page 618 of 974
REJ09B0229-0300