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SH7146 Datasheet, PDF (959/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family
Section 24 Electrical Characteristics
Item
Symbol Min.
Max.
Unit Reference Figure
WAIT setup time
t
1/2t + 18 —
WTS
Bcyc
ns
Figures 24.12 to
24.15
WAIT hold time
tWTH
1/2tBcyc + 18 —
ns
Figures 24.12 to
24.15
Notes: * tBcyc indicates external bus clock time (Bφ = CK).
1. n denotes the number of wait cycles.
2. If the access time conditions are satisfied, the t condition does not need to be
RDS1
satisfied.
3. –20°C to +75°C for SH71491.
CK
A19 to A0
CSn
RD
Read
D15 to D0
Write
WRxx
D15 to D0
T1
T2
tAD1
tCSD
tAS
tCSS
tAD1
tCSD
tRSD
tACC
tOE
tRSD
tCSH
tAH
tRDS1
tRDH1
tWSD1
tWDD1
tWSD1
tCSH
tAH
tWRH
tWDH1
Figure 24.11 Basic Bus Timing for Normal Space (No Wait)
Rev. 3.00 May 17, 2007 Page 915 of 974
REJ09B0229-0300