SH7146 Datasheet, PDF (827/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 19 Flash Memory
(3.6) After erasure finishes, clear FKEY and specify software protection.
If this LSI is restarted by a power-on reset immediately after user MAT erasing has finished,
secure a reset period (period of RES = 0) that is at least as long as the normal 100 µs.
19.5.3 User Boot Mode
This LSI has user boot mode which is initiated with different mode pin settings than those in user
program mode or boot mode. User boot mode is a user-arbitrary boot mode, unlike boot mode that
uses the on-chip SCI.
Only the user MAT can be programmed/erased in user boot mode. Programming/erasing of the
user boot MAT is only enabled in boot mode or programmer mode.
(1) User Boot Mode Initiation
For the mode pin settings to start up user boot mode, see table 19.1.
When the reset start is executed in user boot mode, the check routine for flash-memory related
registers runs. The RAM area about 1.2 kbytes from H'FFFF9800 and 4 bytes from
H'FFFFAFFC (a stack area) is used by the routine. While the check routine is running, NMI
and all other interrupts cannot be accepted. Neither can the AUD be used in this period. This
period is 100 µs while operating at an internal frequency of 40 MHz.
Next, processing starts from the execution start address of the reset vector in the user boot
MAT. At this point, H'AA is set to the flash MAT select register (FMATS) because the
execution MAT is the user boot MAT.
Rev. 3.00 May 17, 2007 Page 783 of 974
REJ09B0229-0300