SH7146 Datasheet, PDF (375/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Figure 10.6 illustrates periodic counter operation.
TCNT value
TGR
Counter cleared by TGR
compare match
H'0000
CST bit
TGF
Time
Flag cleared by software or
DTC activation
Figure 10.6 Periodic Counter Operation
Waveform Output by Compare Match:
The MTU2 can perform 0, 1, or toggle output from the corresponding output pin using compare
match.
1. Example of Setting Procedure for Waveform Output by Compare Match
Figure 10.7 shows an example of the setting procedure for waveform output by compare match
Output selection
Select waveform output [1]
mode
Set output timing
[2]
[1] Select initial value 0 output or 1 output,
and compare match output value 0
output, 1 output, or toggle output, by
means of TIOR. The set initial value is
output at the TIOC pin until the first
compare match occurs.
[2] Set the timing for compare match
generation in TGR.
[3] Set the CST bit in TSTR to 1 to start the
count operation.
Start count operation [3]
<Waveform output>
Figure 10.7 Example of Setting Procedure for Waveform Output by Compare Match
Rev. 3.00 May 17, 2007 Page 331 of 974
REJ09B0229-0300