HD64F3687GHV Datasheet, PDF (91/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 3 Exception Handling
Normal mode operation
RES
φ
Internal address bus
Internal read signal
Reset cleared
Vector fetch
Internal
processing
Initial program
instruction
prefetch
(1)
(2)
Internal write signal
Internal data bus
(16 bits)
(2)
(3)
(1) Reset exception handling vector address (H'0000)
(2) Program start address
(3) Initial program instruction
Advanced mode operation
φ
RES
Internal address bus
Reset cleared
Vector fetch
Internal
processing
Initial program
instruction
prefetch
(1)
(3)
(5)
Internal read signal
Internal write signal
Internal data bus
(16 bits)
(2)
(4)
(6)
(1), (3) Reset exception handling vector address ((1) = H'000000 (3) = H'000002)
(2), (4) Start address (contents of reset exception handling vector address)
(5) Start address
(6) Initial program instruction
Figure 3.1 Reset Sequence
Rev. 3.00 Sep. 10, 2007 Page 57 of 528
REJ09B0216-0300