HD64F3687GHV Datasheet, PDF (296/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 13 Timer Z
13.4.9 Timer Z Output Timing
The outputs of channels 0 and 1 can be disabled or inverted by the settings of TOER and TOCR
and the external level.
1. Output Disable/Enable Timing of Timer Z by TOER: Setting the master enable bit in TOER to
1 disables the output of timer Z. By setting the PCR and PDR of the corresponding I/O port
beforehand, any value can be output. Figure 13.44 shows the timing to enable or disable the
output of timer Z by TOER.
T1
T2
φ
Address bus
TOER address
TOER
N
H'FF
Timer Z
output pin
Timer output
I/O port
Timer Z output
I/O port
Figure 13.44 Example of Output Disable Timing of Timer Z by Writing to TOER
Rev. 3.00 Sep. 10, 2007 Page 262 of 528
REJ09B0216-0300