HD64F3687GHV Datasheet, PDF (426/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 19 Band-Gap Circuit, Power-On Reset, and Low-Voltage Detection Circuits
19.3.3 Deciding Reset Source
The source of a reset can be decided by reading the reset source decision register (LVDRF) in the
reset exception handler (see table 19.2). After that, writing 0 to the bit can clear the flag and can be
ready to decide the next reset source.
Figure 19.7 shows a timing of setting the bits in the register.
Table 19.2 Deciding Reset Source
PRST
1
0
0
LVDRF
WRST
0
0
1
Reset Source
Power-on reset or LVDR occurred
Reset signal input on external reset pin
WDT reset occurred
Power supply voltage
Internal reset signal
PRST bit
WRST bit
Set by
power-on reset
Read and
cleared
(0 is written)
Set by temporary drop of
power supply voltage
Read and
cleared
(0 is written)
Set by
WDT reset
Read and
cleared
(0 is written)
Figure 19.7 Timing of Setting Bits in Reset Source Decision Register
Rev. 3.00 Sep. 10, 2007 Page 392 of 528
REJ09B0216-0300