HD64F3687GHV Datasheet, PDF (118/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 5 Clock Pulse Generator
φOSC
φRC
φ
OSCSEL
PHISTOP
(Internal signal)
CKSTA
CKSWIF
External RC clock operation
φ halt*
On-chip oscillator
clock operation
[Legend]
φOSC:
φRC:
φ:
External clock
On-chip oscillator clock
System clock
OSCSEL: Bit 4 in CKCSR
PHISTOP: System clock stop control signal
CKSTA: Bit 0 in CKCSR
CKSWIF: Bit 2 in CKCSR
Note: * The φ halt duration is the duration from the timing when the φ clock stops to the
seventh rising edge of the φ_RC clock.
Figure 5.7 Timing Chart to Switch from External Clock to On-Chip Oscillator Clock
Rev. 3.00 Sep. 10, 2007 Page 84 of 528
REJ09B0216-0300