HD64F3687GHV Datasheet, PDF (109/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 5 Clock Pulse Generator
Bit
4
3 to 0
Initial
Bit Name Value
TRMDRWE 0
R/W
R/W

All 1 
Description
Trimming Data Register Write Enable
This register can be written to when the LOCKDW bit is 0
and this bit is 1.
[Setting condition]
• When writing 0 to the WRI bit while writing 1 to the
TRMDRWE bit while the PRWE bit is 1
[Clearing conditions]
• Reset
• When writing 0 to the WRI bit and writing 0 to the
TRMDRWE bit while the PRWE bit is 1
Reserved
These bits are always read as 1.
5.2.3 RC Trimming Data Register (RCTRMDR)
RCTRMDR stores the trimming data of the on-chip oscillator frequency (FSEL = 1, 20 MHz).
Initial
Bit
Bit Name Value R/W Description
7
TRMD7 (0)* R/W Trimming Data (FSEL = 1, 20 MHz)
6
TRMD6 (0)* R/W The trimming data is loaded from the flash memory to this
5
TRMD5 (0)* R/W ^{register right after a reset.}
4
TRMD4 (0)* R/W ^{The on-chip oscillator clock (FSEL = 1, 20 MHz) can be}
trimmed by changing these bits.
3
TRMD3 (0)* R/W
The frequency of the on-chip oscillator clock changes
2
TRMD2 (0)* R/W _{right after writing these bits. These bits are initialized to}
1
TRMD1 (0)* R/W ^H'00.
0
TRMD0 (0)* R/W Changes in frequency are shown below (bit TRMD7 is a
sign bit).
(Min.) H'80 ← … ← H'FF ← … ← H'00 → … →H'01 → …
→ H'7F (Max.)
Note: * These values are initialized to the trimming data loaded from the flash memory.
Rev. 3.00 Sep. 10, 2007 Page 75 of 528
REJ09B0216-0300