HD64F3687GHV Datasheet, PDF (429/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 21 List of Registers
Section 21 List of Registers
The register list gives information on the on-chip I/O register addresses, how the register bits are
configured, and the register states in each operating mode. The information is given as shown
below.
1. Register addresses (address order)
• The register addresses listed in the table are the address values (16 bits) in the 64-Kbyte
address space. The value of the sixteen higher-order bits of address values (24 bits) in the 16-
Mbyte address space is H'FF.
• Registers are listed from the lower allocation addresses.
• The symbol  in the register-name column represents a reserved address or range of reserved
addresses.
Do not attempt to access reserved addresses.
• When the register address is 16-bit wide, the address of the upper byte is given in the list.
• Registers are classified by functional modules.
• The data bus width is indicated.
• The number of access states is indicated.
2. Register bits
• Bit configurations of the registers are described in the same order as the register addresses.
• Reserved bits are indicated by  in the bit name column.
• When registers consist of 16 bits, bits are described from the MSB side.
3. Register states in each operating mode
• Register states are described in the same order as the register addresses.
• The register states described here are for the basic operating modes. If there is a specific reset
for an on-chip peripheral module, refer to the section on that on-chip peripheral module.
Rev. 3.00 Sep. 10, 2007 Page 395 of 528
REJ09B0216-0300