HD64F3687GHV Datasheet, PDF (17/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

13.4.6 Reset Synchronous PWM Mode ....................................................................... 240
13.4.7 Complementary PWM Mode ............................................................................ 244
13.4.8 Buffer Operation ............................................................................................... 254
13.4.9 Timer Z Output Timing .................................................................................... 262
13.5 Interrupts........................................................................................................................... 265
13.5.1 Status Flag Set Timing...................................................................................... 265
13.5.2 Status Flag Clearing Timing ............................................................................. 267
13.6 Usage Notes ...................................................................................................................... 268
Section 14 Watchdog Timer ................................................................................275
14.1 Features............................................................................................................................. 275
14.2 Register Descriptions ........................................................................................................ 276
14.2.1 Timer Control/Status Register WD (TCSRWD)............................................... 276
14.2.2 Timer Counter WD (TCWD) ............................................................................ 278
14.2.3 Timer Mode Register WD (TMWD) ................................................................ 278
14.3 Operation .......................................................................................................................... 279
Section 15 14-Bit PWM.......................................................................................281
15.1 Features............................................................................................................................. 281
15.2 Input/Output Pin ............................................................................................................... 282
15.3 Register Descriptions ........................................................................................................ 283
15.3.1 PWM Control Register (PWCR)....................................................................... 283
15.3.2 PWM Data Registers U and L (PWDRU, PWDRL)......................................... 283
15.4 Operation .......................................................................................................................... 284
Section 16 Serial Communication Interface 3 (SCI3) .........................................285
16.1 Features............................................................................................................................. 285
16.2 Input/Output Pins.............................................................................................................. 288
16.3 Register Descriptions ........................................................................................................ 289
16.3.1 Receive Shift Register (RSR) ........................................................................... 289
16.3.2 Receive Data Register (RDR) ........................................................................... 289
16.3.3 Transmit Shift Register (TSR) .......................................................................... 289
16.3.4 Transmit Data Register (TDR).......................................................................... 290
16.3.5 Serial Mode Register (SMR)............................................................................. 290
16.3.6 Serial Control Register 3 (SCR3)...................................................................... 292
16.3.7 Serial Status Register (SSR) ............................................................................. 294
16.3.8 Bit Rate Register (BRR) ................................................................................... 296
16.4 Operation in Asynchronous Mode .................................................................................... 303
16.4.1 Clock................................................................................................................. 303
16.4.2 SCI3 Initialization............................................................................................. 304
Rev. 3.00 Sep. 10, 2007 Page xv of xxxii