HD64F3687GHV Datasheet, PDF (242/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 13 Timer Z
Initial
Bit
Bit Name Value R/W Description
2
PWMD0 0
R/W PWM Mode D0
0: FTIOD0 operates normally
1: FTIOD0 operates in PWM mode
1
PWMC0 0
R/W PWM Mode C0
0: FTIOC0 operates normally
1: FTIOC0 operates in PWM mode
0
PWMB0 0
R/W PWM Mode B0
0: FTIOB0 operates normally
1: FTIOB0 operates in PWM mode
13.3.4 Timer Function Control Register (TFCR)
TFCR selects the settings and output levels for each operating mode.
Initial
Bit
Bit Name Value R/W Description
7

1

Reserved
This bit is always read as 1.
6
STCLK 0
R/W External Clock Input Select
0: External clock input is disabled
1: External clock input is enabled
5
ADEG
0
R/W A/D Trigger Edge Select
A/D module should be set to start an A/D conversion by
the external trigger
0: A/D trigger at the crest in complementary PWM mode
1: A/D trigger at the trough in complementary PWM mode
4
ADTRG 0
R/W External Trigger Disable
0: A/D trigger for PWM cycles is disabled in
complementary PWM mode
1: A/D trigger for PWM cycles is enabled in
complementary PWM mode
Rev. 3.00 Sep. 10, 2007 Page 208 of 528
REJ09B0216-0300