HD64F3687GHV Datasheet, PDF (191/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 9 I/O Ports
9.6.2 Port Data Register 7 (PDR7)
PDR7 is a general I/O port data register of port 7.
Initial
Bit
Bit Name Value R/W Description
7

1

Stores output data for port 7 pins.
6
P76
0
5
P75
0
4
P74
0
3

1
2
P72
0
R/W If PDR7 is read while PCR7 bits are set to 1, the value
R/W ^{stored in PDR7 are read. If PDR7 is read while PCR7 bits}
are cleared to 0, the pin states are read regardless of the
R/W _{value stored in PDR7.}

Bits 7 and 3 are reserved bits. These bits are always read
R/W ^{as 1.}
1
P71
0
R/W
0
P70
0
R/W
9.6.3 Pin Functions
The correspondence between the register specification and the port functions is shown below.
P76/TMOV pin
Register
TCSRV
PCR7
Bit Name
OS3 to OS0 PCR76
Setting Value 0000
0
1
Other than x
the above
values
[Legend] x: Don't care.
Pin Function
P76 input pin
P76 output pin
TMOV output pin
P75/TMCIV pin
Register
PCR7
Bit Name
PCR75
Setting Value 0
1
Pin Function
P75 input/TMCIV input pin
P75 output/TMCIV input pin
Rev. 3.00 Sep. 10, 2007 Page 157 of 528
REJ09B0216-0300