HD64F3687GHV Datasheet, PDF (301/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 13 Timer Z
13.5.2 Status Flag Clearing Timing
The status flag can be cleared by writing 0 after reading 1 from the CPU. Figure 13.51 shows the
timing in this case.
φ
Address
WTSR
(internal write signal)
IMF, OVF
ITMZ
TSR address
Figure 13.51 Status Flag Clearing Timing
Rev. 3.00 Sep. 10, 2007 Page 267 of 528
REJ09B0216-0300