HD64F3687GHV Datasheet, PDF (376/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 17 I²C Bus Interface 2 (IIC2)
Initial
Bit
Bit Name Value R/W Description
3
STOP
0
R/W Stop Condition Detection Flag
[Setting conditions]
• In master mode, when a stop condition is detected
after frame transfer
• In slave mode, when a stop condition is detected after
the following events:
 A general call is invoked
 A start condition is detected
 The first byte in the slave address matches the
address set in the SAR
[Clearing condition]
• When 0 is written in STOP after reading STOP = 1
2
AL/OVE 0
R/W Arbitration Lost Flag/Overrun Error Flag
This flag indicates that arbitration was lost in master
mode with the I²C bus format and that the final bit has
been received while RDRF = 1 with the clock
synchronous format.
When two or more master devices attempt to seize the
bus at nearly the same time, if the I²C bus interface
detects data differing from the data it sent, it sets AL to 1
to indicate that the bus has been taken by another
master.
[Setting conditions]
• If the internal SDA and SDA pin disagree at the rise of
SCL in master transmit mode
• When the SDA pin outputs high in master mode while
a start condition is detected
• When the final bit is received with the clock
synchronous format while RDRF = 1
[Clearing condition]
• When 0 is written in AL/OVE after reading AL/OVE=1
Rev. 3.00 Sep. 10, 2007 Page 342 of 528
REJ09B0216-0300