HD64F3687GHV Datasheet, PDF (73/566 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 2 CPU
Reset state
Reset cleared
Reset occurs
Exception-handling state
Reset
occurs
Reset
occurs
Interrupt
source
Interrupt
source
Exception-
handling
complete
Program halt state
Program execution state
SLEEP instruction executed
Figure 2.12 State Transitions
2.8 Usage Notes
2.8.1 Notes on Data Access to Empty Areas
The address space of this LSI includes empty areas in addition to the ROM, RAM, and on-chip
I/O registers areas available to the user. When data is transferred from CPU to empty areas, the
transferred data will be lost. This action may also cause the CPU to malfunction. When data is
transferred from an empty area to CPU, the contents of the data cannot be guaranteed.
2.8.2 EEPMOV Instruction
EEPMOV is a block-transfer instruction and transfers the number of bytes indicated by R4L and
starting at the address indicated by R5 to the address indicated by R6. In products for normal-
mode operation, set R4L and R6 so that the final address at the destination for transfer (value of
R6 + R4L) does not exceed H'FFFF (the value of R6 must not change from H'FFFF to H'0000
during execution). In products for advanced-mode operation, set R4L and R6 so that the final
address at the destination for transfer (value of R6 + R4L) does not exceed H'FFFFFF (the value
of R6 must not change from H'FFFFFF to H'000000 during execution).
Rev. 3.00 Sep. 10, 2007 Page 39 of 528
REJ09B0216-0300