HD64F2636F20 Datasheet, PDF (789/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
Section 20 RAM
H'FFD800
H'FFD802
H'FFD804
H'FFD801
H'FFD803
H'FFD805
H'FFEFBE
H'FFFFC0
H'FFEFBF
H'FFFFC1
H'FFFFFE
H'FFFFFF
Figure 20-1 (c) Block Diagram of RAM (H8S/2635 Group)
20.1.2 Register Configuration
The on-chip RAM is controlled by SYSCR. Table 20-1 shows the address and initial value of
SYSCR.
Table 20-1 RAM Register
Name
Abbreviation R/W
System control register
SYSCR
R/W
Note: * Lower 16 bits of the address.
Initial Value
H'01
Address^*
H'FDE5
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 739 of 1458