HD64F2636F20 Datasheet, PDF (1365/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
SCKCR—System Clock Control Register
Bit
7
6
5
4
PSTOP ⎯
⎯
⎯
Initial value
0
0
0
0
Read/Write R/W
⎯
⎯
⎯
Appendix B Internal I/O Register
H'FDE6
System
3
STCS
0
R/W
2
SCK2
0
R/W
1
SCK1
0
R/W
0
SCK0
0
R/W
System Clock Select
0 0 0 Bus master in high-speed mode
1 Medium-speed clock is φ/2
1 0 Medium-speed clock is φ/4
1 Medium-speed clock is φ/8
1 0 0 Medium-speed clock is φ/16
1 Medium-speed clock is φ/32
1 ⎯⎯
Frequency Multiplication Factor Switching Mode Select
0 Specified multiplication factor is valid after transition to software
standby mode, watch mode*, or subactive mode*
1 Specified multiplication factor is valid immediately after STC
bits are rewritten
φ Clock Output Disable
DDR
0
1
1
PSTOP
⎯
0
1
Hardware standby mode
High impedance High impedance High impedance
Software standby mode,
High impedance Fixed high
Fixed high
watch mode*, and direct transition
Sleep mode and subsleep mode* High impedance φ output
Fixed high
High-speed mode, medium-speed High impedance φ output
Fixed high
mode, and subactive mode*
Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the
U-mask and W-mask versions, and H8S/2635 Group only.
These functions cannot be used with the other versions.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
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