HD64F2636F20 Datasheet, PDF (200/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 7 Bus Controller
7.1.2 Block Diagram
Figure 7-1 shows a block diagram of the bus controller.
External bus control signals
Area decoder
ABWCR
ASTCR
BCRH
BCRL
Bus
controller
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Internal
address bus
Internal control
signals
Bus mode signal
Wait
controller
WCRH
WCRL
Bus arbiter
CPU bus request signal
DTC bus request signal
CPU bus acknowledge signal
DTC bus acknowledge signal
Legend:
ABWCR: Bus width control register
ASTCR: Access state control register
BCRH: Bus control register H
BCRL: Bus control register L
WCRH: Wait control register H
WCRL: Wait control register L
Figure 7-1 Block Diagram of Bus Controller
Page 150 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010