HD64F2636F20 Datasheet, PDF (394/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 10 16-Bit Timer Pulse Unit (TPU)
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
10.2.8 Timer Start Register (TSTR)
Bit
:
7
—
Initial value :
0
R/W
:—
6
5
—
CST5
0
0
—
R/W
4
CST4
0
R/W
3
CST3
0
R/W
2
CST2
0
R/W
1
CST1
0
R/W
0
CST0
0
R/W
TSTR is an 8-bit readable/writable register that selects operation/stoppage for channels 0 to 5.
TSTR is initialized to H'00 by a reset, and in hardware standby mode. When setting the operating
mode in TMDR or setting the count clock in TCR, first stop the TCNT counter.
Bits 7 and 6—Reserved: Should always be written with 0.
Bits 5 to 0—Counter Start 5 to 0 (CST5 to CST0): These bits select operation or stoppage for
TCNT.
Bit n
CSTn
Description
0
TCNTn count operation is stopped
(Initial value)
1
TCNTn performs count operation
Note:
n = 5 to 0
If 0 is written to the CST bit during operation with the TIOC pin designated for output, the
counter stops but the TIOC pin output compare output level is retained. If TIOR is written to
when the CST bit is cleared to 0, the pin output level will be changed to the set initial output
value.
Page 344 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010