HD64F2636F20 Datasheet, PDF (490/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 12 Watchdog Timer
TCNT value
H'FF
Overflow
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
H'00
WT/IT = 1 Write H'00
TME = 1 to TCNT
Internal reset signal*
WOVF = 1
Internal reset is
generated
Time
WT/IT = 1 Write H'00
TME = 1 to TCNT
518 states
Legend:
WT/IT: Timer mode select bit
TME: Timer enable bit
Note: * The internal reset signal is generated only if the RSTE bit is set to 1.
Figure 12-4 (a) WDT0 Watchdog Timer Operation
TCNT value
H'FF
Overflow
H'00
WT/IT = 1
TME = 1
Write H'00
to TCNT
WOVF = 1*
Internal reset
is generated
Time
WT/IT = 1 Write H'00
TME = 1 to TCNT
Internal
reset signal
515/516 states
Legend:
WT/IT: Timer mode select bit
TME: Timer enable bit
Note: * The WOVF bit is set to 1 and then cleared to 0 by an internal reset.
Figure 12-4 (b) WDT1 Watchdog Timer Operation
Page 440 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010