HD64F2636F20 Datasheet, PDF (308/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 9 I/O Ports
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Pin
PA0/A16
Selection Method and Pin Functions
The pin function is switched as shown below according to the operating mode,
bits AE3 to AE0 in PFCR, and bit PA0DDR.
Operating mode
Modes 4 to 6
AE3 to AE0
B'0000 to B'1000
B'1001 to B'1111
PA0DDR
0
1
—
Pin function
PA0 input
PA0 output
A16 output
Operating mode
PA0DDR
Pin function
0
PA0 input
Mode 7
1
PA0 output
9.6.4 Pin Functions
Modes 4 to 6: In modes 4 to 6, port A pins function as address outputs according to the setting of
AE3 to AE0 in PFCR; when they do not function as address outputs, the pins function as SCI I/O
pins and I/O ports.
Port A pin functions in modes 4 to 6 are shown in figure 9-6.
Port A
PA3 (I/O) / A19 (output) / SCK2 (I/O)
PA2 (I/O) / A18 (output) / RxD2 (input)
PA1 (I/O) / A17 (output) / TxD2 (output)
PA0 (I/O) / A16 (output)
Figure 9-6 Port A Pin Functions (Modes 4 to 6)
Mode 7: In mode 7, port A pins function as I/O ports and SCI2 I/O pins (SCK2, TxD2, RxD2).
Input or output can be specified for each pin on an individual bit basis. Setting a PADDR bit to 1
makes the corresponding port A pin an output port, while clearing the bit to 0 makes the pin an
input port.
Port A pin functions are shown in figure 9-7.
Page 258 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010