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HD64F2636F20 Datasheet, PDF (53/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series | |||
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H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 1 Overview
Item
Specification
16-bit timer-pulse ⢠6-channel 16-bit timer on-chip
unit (TPU)
⢠Pulse I/O processing capability for up to 16 pins'
⢠Automatic 2-phase encoder count capability
Programmable
â¢
pulse generator
â¢
(PPG)
(This function is not â¢
implemented in the â¢
H8S/2635 Group)
Maximum 8-bit pulse output possible with TPU as time base
Output trigger selectable in 4-bit groups
Non-overlap margin can be set
Direct output or inverse output setting possible
Watchdog timer ⢠Watchdog timer or interval timer selectable
(WDT) 2 channels ⢠Operation using sub-clock supported (WDT1 only)*
Motor control
PWM timer
(PWM)
⢠Maximum of 16 10-bit PWM outputs
⢠Eight outputs with two channels each built in
⢠Duty settable between 0% and 100%
⢠Automatic transfer of buffer register data supported
⢠Settable to any one of 5 operating speeds
Serial communica- ⢠Asynchronous mode or synchronous mode selectable
tion interface (SCI) ⢠Multiprocessor communication function
3 channels
(SCI0 to SCI2)
⢠Smart card interface function
Controller area
⢠CAN: Ver. 2.0B compliant
network (HCAN) 2 ⢠Buffer size: 15 transmit/receive messages, transmit only one message
channels
(The H8S/2635
⢠Filtering of receive messages
Group has one
HCAN channel)
A/D converter
⢠Resolution: 10 bits
⢠Input: 12 channels
⢠High-speed conversion: 13.3 µs minimum conversion time
(at 20-MHz operation)
⢠Single or scan mode selectable
⢠Sample and hold circuit
⢠A/D conversion can be activated by external trigger or timer trigger
D/A converter
â¢
(This function is not â¢
implemented in the
H8S/2635 Group)
Resolution: 8 bits
Output: 2 channels
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 3 of 1458
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