HD64F2636F20 Datasheet, PDF (253/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 8 Data Transfer Controller (DTC)
Figure 8-3 shows a block diagram of activation source control. For details see section 5, Interrupt
Controller.
Source flag cleared
Clear
DTCER
Select
Clear
controller
Clear request
On-chip
supporting
module
IRQ interrupt
DTVECR
Interrupt
request
DTC
Interrupt controller
Interrupt mask
CPU
Figure 8-3 Block Diagram of DTC Activation Source Control
When an interrupt has been designated a DTC activation source, existing CPU mask level and
interrupt controller priorities have no effect. If there is more than one activation source at the same
time, the DTC operates in accordance with the default priorities.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 203 of 1458