HD64F2636F20 Datasheet, PDF (1439/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Appendix B Internal I/O Register
SMR0—Serial Mode Register 0
SMR1—Serial Mode Register 1
SMR2—Serial Mode Register 2
H'FF78
H'FF80
H'FF88
Smart Card Interface 0
Smart Card Interface 1
Smart Card Interface 2
Bit
7
6
5
4
3
2
1
0
GM
BLK
PE
O/E BCP1 BCP0 CKS1 CKS0
Initial value
0
0
0
0
0
0
0
0
Read/Write R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Clock Select 1 and 0
0 0 φ clock
1 φ/4 clock
1 0 φ/16 clock
1 φ/64 clock
Basic Clock Pulse
0 0 32 clock periods
1 64 clock periods
1 0 372 clock periods
1 256 clock periods
Parity Mode
0 Even parity*²
1 Odd parity^*3
Parity Enable
0 Parity bit addition and checking disabled
1 Parity bit addition and checking enabled*¹
Block Transfer Mode
0 Normal Smart Card interface mode operation
• Error signal transmission/detection and automatic data retransmission performed
• TXI interrupt generated by TEND flag
• TEND flag set 12.5 etu after start of transmission (11.0 etu in GSM mode)
1 Block transfer mode operation
• Error signal transmission/detection and automatic data retransmission not performed
• TXI interrupt generated by TDRE flag
• TEND flag set 11.5 etu after start of transmission (11.0 etu in GSM mode)
Note: etu: Elementary time unit (time for transfer of 1 bit)
GSM Mode
0 Normal smart card interface mode operation
• TEND flag generation 12.5 etu (11.5 etu in block transfer mode) after beginning of start bit
• Clock output ON/OFF control only
1 GSM mode smart card interface mode operation
• TEND flag generation 11.0 etu after beginning of start bit
• High/Low fixing control possible in addition to clock output ON/OFF control (set by SCR)
Note: etu: Elementary time unit (time for transfer of 1 bit)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 1389 of 1458