HD64F2636F20 Datasheet, PDF (616/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 15 I²C Bus Interface [Option]
(Only for the H8S/2638, H8S/2639, and H8S/2630)
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Table 15-3 Flags and Transfer States
MST TRS BBSY ESTP STOP IRTR AASX AL
1/0 1/0 0
0
0
0
0
0
110
0
0
0
0
0
111
0
0
1
0
0
1 1/0 1
0
0
0
0
0
1 1/0 1
0
0
1
0
0
001
0
0
0
1/0 1
001
0
0
0
0
0
001
0
0
0
0
0
001
0
0
0
1
0
0 1/0 1
0
0
0
0
0
0 1/0 1
0
0
1
1
0
011
0
0
0
1
0
0 1/0 0
1/0 1/0 0
0
0
AAS ADZ ACKB State
000
Idle state (flag
clearing required)
000
Start condition
issuance
000
Start condition
established
0 0 0/1 Master mode wait
0 0 0/1 Master mode
transmit/receive end
1/0 1/0 0
Arbitration lost
100
SAR match by first
frame in slave mode
110
General call
address match
000
SARX match
0 0 0/1 Slave mode
transmit/receive end
(except after SARX
match)
000
001
Slave mode
transmit/receive end
(after SARX match)
0 0 0/1 Stop condition
detected
Bit 0—Start Condition/Stop Condition Prohibit (SCP): Controls the issuing of start and stop
conditions in master mode. To issue a start condition, write 1 in BBSY and 0 in SCP. A retransmit
start condition is issued in the same way. To issue a stop condition, write 0 in BBSY and 0 in SCP.
This bit is always read as 1. If 1 is written, the data is not stored.
Bit 0
SCP
0
1
Description
Writing 0 issues a start or stop condition, in combination with the BBSY flag
Reading always returns a value of 1
Writing is ignored
(Initial value)
Page 566 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010