HD64F2636F20 Datasheet, PDF (670/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 16 Controller Area Network (HCAN)
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Bit 1—Halt Request (MCR1): Controls halting of the HCAN module.
Bit 1: MCR1
0
1
Description
HCAN normal operating mode
HCAN halt mode transition request
(Initial value)
Bit 0—Reset Request (MCR0): Controls resetting of the HCAN module.
Bit 0: MCR0
0
1
Description
Normal operating mode (MCR0 = 0 and GSR3 = 0)
[Setting condition]
• When 0 is written after an HCAN reset
HCAN reset mode transition request
(Initial value)
In order for GSR3 to change from 1 to 0 after 0 is written to MCR0, time is required before the
HCAN is internally reset. There is consequently a delay before GSR3 is cleared to 0 after MCR0
is cleared to 0.
16.2.2 General Status Register (GSR)
The general status register (GSR) is an 8-bit readable register that indicates the status of the CAN
bus.
GSR
Bit: 7
6
5
4
3
2
1
0
—
—
—
— GSR3 GSR2 GSR1 GSR0
Initial value: 0
0
0
0
1
1
0
0
R/W: R
R
R
R
R
R
R
R
Bits 7 to 4—Reserved: These bits always read 0.
Page 620 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010