HD64F2636F20 Datasheet, PDF (1364/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Appendix B Internal I/O Register
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
SYSCR—System Control Register
H'FDE5
Bit
Initial value
Read/Write
7
MACS
0
R/W
6
5
4
3
2
⎯ INTM1 INTM0 NMIEG ⎯
0
0
0
0
0
⎯
R/W R/W R/W
⎯
System
1
0
⎯ RAME
0
1
⎯
R/W
RAM Enable
0 On-chip RAM is disabled
1 On-chip RAM is enabled
NMI Edge Select
0 An interrupt is requested at the falling edge of NMI input
1 An interrupt is requested at the rising edge of NMI input
Interrupt Control Mode 1 and 0
INTM1 INTM0 Interrupt
Control Mode
Description
0
0
0
Control of interrupts by I bit
1
⎯
Setting prohibited
1
0
2
Control of interrupts by I2 to I0 bits and IPR
1
⎯
Setting prohibited
MAC Saturation
0 Non-saturating calculation for MAC instruction
1 Saturating calculation for MAC instruction
Page 1314 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010