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HD64F2636F20 Datasheet, PDF (517/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series | |||
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H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 13 Serial Communication Interface (SCI)
The BRR setting is found from the following formulas.
Asynchronous mode:
N=
Ï
64 Ã 22nâ1 Ã B
à 106 â 1
Clocked synchronous mode:
N=
Ï
8 Ã 22nâ1 Ã B
à 106 â 1
Where B: Bit rate (bit/s)
N: BRR setting for baud rate generator (0 ⤠N ⤠255)
Ï: Operating frequency (MHz)
n: Baud rate generator input clock (n = 0 to 3)
(See the table below for the relation between n and the clock.)
SMR Setting
n
Clock
CKS1
CKS0
0
Ï
0
0
1
Ï/4
0
1
2
Ï/16
1
0
3
Ï/64
1
1
The bit rate error in asynchronous mode is found from the following formula:
Ï Ã 106
Error (%) = { (N + 1) Ã B Ã 64 Ã 22nâ1 â 1} Ã 100
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 467 of 1458
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