HD64F2636F20 Datasheet, PDF(772/1512 Page) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

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HD64F2636F20 Datasheet, PDF (772/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

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Section 19 Motor Control PWM Timer

H8S/2639, H8S/2638, H8S/2636,

H8S/2630, H8S/2635 Group

19.2.4 PWM Counters 1 and 2 (PWCNT1, PWCNT2)

Bit

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ââââââ

Initial value 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0

Read/Write â â â â â â â â â â â â â â â â

PWCNT is a 10-bit up-counter incremented by the input clock. The input clock is selected by

clock select bits 2 to 0 (CKS2 to CKS0) in PWCR.

PWCNT1 is used as the channel 1 time base, and PWCNT2 as the channel 2 time base.

PWCNT is initialized to H'FC00 when the counter start bit (CST) in PWCR is cleared to 0, and

also upon reset and in standby mode, watch mode*, subactive mode*, subsleep mode*, and

module stop mode.

Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the

U-mask and W-mask versions, and H8S/2635 Group only.

These functions cannot be used with the other versions.

Page 722 of 1458

REJ09B0103-0800 Rev. 8.00

May 28, 2010

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