HD64F2636F20 Datasheet, PDF (1490/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Appendix C I/O Port Block Diagrams
C.6 Port B Block Diagram
*1
PBn
*2
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Reset
R
Q
D
PBnPCR
C
WPCRB
RPCRB
(Output compare)
TPU output
TPU
output
enable
Modes 4/5/6
Address
enable
Reset
R
Q
D
PBnDDR
C
WDDRB
Reset
R
Q
D
PBnDR
C
WDRB
Reset
R
Q
D
PBnODR
C
WODRB
RODRB
TPU input
(Input capture)
RDRB
RPORB
Legend:
Notes: 1. Output enable signal
WDDRB: Write to PBDDR
2. Open drain control signal
WDRB: Write to PBDR
WODRB: Write to PBODR
WPCRB: Write to PBPCR
RDRB: Read PBDR
RPORB: Read port B
RODRB: Read PBODR
RPCRB: Read PBPCR
n = 0 to 7
Figure C-6 Port B Block Diagram (Pins PB0 to PB7)
Page 1440 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010