HD64F2636F20 Datasheet, PDF (383/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 10 16-Bit Timer Pulse Unit (TPU)
Bit 3 Bit 2 Bit 1 Bit 0
Channel IOC3 IOC2 IOC1 IOC0 Description
3
0 0 0 0 TGR3C Output disabled
(Initial value)
1
is output _{Initial output is 0 0 output at compare match}
1
0
compare
register^*1
output
1 output at compare match
1
Toggle output at compare
match
100
Output disabled
1
10
Initial output is 1 0 output at compare match
output
1 output at compare match
1
Toggle output at compare
match
1
0
0
0
TGR3C Capture input Input capture at rising edge
1
is input source is
capture TIOCC3 pin
1
*
register^*1
Input capture at falling edge
Input capture at both edges
1
*
*
Capture input Input capture at TCNT4
source is channel count-up/count-down
4/count clock
*: Don’t care
Note: 1. When the BFA bit in TMDR3 is set to 1 and TGR3C is used as a buffer register, this
setting is invalid and input capture/output compare is not generated.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 333 of 1458