HD64F2636F20 Datasheet, PDF (105/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 2 CPU
(4) Condition Field: Specifies the branching condition of Bcc instructions.
Figure 2-12 shows examples of instruction formats.
(1) Operation field only
op
NOP, RTS, etc.
(2) Operation field and register fields
op
rn
rm
ADD.B Rn, Rm, etc.
(3) Operation field, register fields, and effective address extension
op
rn
EA (disp)
rm
MOV.B @(d:16, Rn), Rm, etc.
(4) Operation field, effective address extension, and condition field
op
cc
EA (disp)
BRA d:16, etc
Figure 2-12 Instruction Formats (Examples)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 55 of 1458