HD64F2636F20 Datasheet, PDF (59/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 1 Overview
1.3 Pin Description
1.3.1 Pin Arrangement
Figure 1-2 shows the pin arrangement of the H8S/2636, figure 1-3 shows the pin arrangement of
the H8S/2638 and H8S/2630, figure 1-4 shows the pin arrangement of the H8S/2639, and figure
1-5 shows the pin arrangement of the H8S/2635 Group.
P40/AN0 103
P41/AN1 104
P42/AN2 105
P43/AN3 106
P44/AN4 107
P45/AN5 108
P46/AN6/DA0 109
P47/AN7/DA1 110
P90/AN8 111
P91/AN9 112
P92/AN10 113
P93/AN11 114
AVSS 115
MD0 116
MD1 117
MD2 118
PF0/IRQ2 119
PB7/A15/TIOCB5 120
PB6/A14/TIOCA5 121
PB5/A13/TIOCB4 122
PB4/A12/TIOCA4 123
PB3/A11/TIOCD3 124
PB2/A10/TIOCC3 125
PB1/A9/TIOCB3 126
VSS 127
PB0/A8/TIOCA3 128
TOP VIEW
(FP-128B)
64 P W M V S S
63 PJ7/ P W M 2 H
62 PJ6/ P W M 2 G
61 PJ5/ P W M 2 F
60 PJ4/ P W M 2 E
59 P W M V C C
58 PJ3/ P W M 2 D
57 PJ2/ P W M 2 C
56 PJ1/ P W M 2 B
55 PJ0/ P W M 2 A
54 PWMVSS
53 PH7/ P W M 1 H
52 PH6/ P W M 1 G
51 PH5/ P W M 1 F
50 PH4/ P W M 1 E
49 PWMVCC
48 PH3/ P W M 1 D
47 PH2/ P W M 1 C
46 PH1/ P W M 1 B
45 PH0/ P W M 1 A
44 PWMVSS
43 VSS
42 PF3/LWR/ADTRG/IRQ3
41 PF4/HWR
40 PF5/RD
39 PF6/AS
Notes: 1. Connect a 0.1 µF capacitor between VCL and VSS (close to the pins).
2. Subclock functions (subactive mode, subsleep mode, and watch
mode) are available in the U-mask version.
These functions cannot be used with the other versions.
INDEX
See section 22A.7, Subclock Oscillator, for the method of fixing pins
OSC1 and OSC2.
3. The FWE pin is for compatibility with the flash memory version.
The FWE pin is a NC pin in the mask ROM versions.
In the mask ROM version, the FWE pin must be left open or be
connected to Vss.
INDEX
64F2636F20
H8S/2636
(U-Mask Version)
64F2636F20
H8S/2636
U
Figure 1-2 Pin Arrangement of H8S/2636 Group (FP-128B: Top View)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
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