HD64F2636F20 Datasheet, PDF (677/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 16 Controller Area Network (HCAN)
16.2.7 Transmit Acknowledge Register (TXACK)
The transmit acknowledge register (TXACK) is a 16-bit readable/writable register containing
status flags that indicate normal transmission of mailbox (buffer) transmit messages.
TXACK
Bit: 15
14
13
12
11
10
9
8
TXACK7 TXACK6 TXACK5 TXACK4 TXACK3 TXACK2 TXACK1 —
Initial value: 0
0
0
0
0
0
0
0
R/W: R/(W)^* R/(W)^* R/(W)^* R/(W)^* R/(W)^* R/(W)^* R/(W)^* R
Bit: 7
6
5
4
3
2
1
0
TXACK15 TXACK14 TXACK13 TXACK12 TXACK11 TXACK10 TXACK9 TXACK8
Initial value: 0
0
0
0
0
0
0
0
R/W: R/(W)^* R/(W)^* R/(W)^* R/(W)^* R/(W)^* R/(W)^* R/(W)^* R/(W)^*
Note: * Only a write of 1 is permitted, to clear the flag.
Bits 15 to 9 and 7 to 0—Transmit Acknowledge Register (TXACK7 to TXACK1, TXACK15
to TXACK8): These bits indicate that a transmit message in the corresponding HCAN mailbox
has been transmitted normally.
Bit y: TXACKx
0
1
Description
[Clearing condition]
• Writing 1
(Initial value)
Completion of message transmission for corresponding mailbox
(x = 15 to 1, y = 15 to 9 and 7 to 0)
Bit 8—Reserved: This bit always reads 0. The write value should always be 0.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 627 of 1458