MEGA128CAN Datasheet, PDF (94/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

8-bit Timer/Counter0 with PWM
Timer/Counter0 is a general purpose, single channel, 8-bit Timer/Counter module. The
main features are:
Features
• Single Channel Counter
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Frequency Generator
• External Event Counter
• 10-bit Clock Prescaler
• Overflow and Compare Match Interrupt Sources (TOV0 and OCF0A)
Overview
Many register and bit references in this section are written in general form.
• A lower case “n” replaces the Timer/Counter number, in this case 0. However, when
using the register or bit defines in a program, the precise form must be used, i.e.,
TCNT0 for accessing Timer/Counter0 counter value and so on.
• A lower case “x” replaces the Output Compare unit channel, in this case A.
However, when using the register or bit defines in a program, the precise form must
be used, i.e., OCR0A for accessing Timer/Counter0 output compare channel A
value and so on.
A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 37. For the
actual placement of I/O pins, refer to “Pinout AT90CAN128- TQFP” on page 4. CPU
accessible I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-
specific I/O Register and bit locations are listed in the “8-bit Timer/Counter Register
Description” on page 104.
Figure 37. 8-bit Timer/Counter Block Diagram
TCCRn
count
clear
direction
Control Logic
BOTTOM
TOP
Timer/Counter
TCNTn
= 0 = 0xFF
clk_Tn
Clock Select
Edge
Detector
( From Prescaler )
=
OCRnx
Waveform
Generation
TOVn
(Int.Req.)
Tn
OCn
(Int.Req.)
OCnx
Registers
The Timer/Counter (TCNT0) and Output Compare Register (OCR0A) are 8-bit registers.
Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer
94 AT90CAN128
4250E–CAN–12/04