MEGA128CAN Datasheet, PDF (244/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

Interrupt Behavior
When an interrupt occurs, the corresponding bit is set in the CANSITn or CANGIT
registers.
To acknowledge a MOb interrupt, the corresponding bits of CANSTMOB register
(RXOK, TXOK,...) must be cleared by the software application. This operation needs a
read-modify-write software routine.
To acknowledge a general interrupt, the corresponding bits of CANGIT register (BXOK,
BOFFIT,...) must be cleared by the software application. This operation is made writing
a logical one in these interrupt flags (writing a logical zero doesn’t change the interrupt
flag value).
OVRTIM interrupt flag is reset as the other interrupt sources of CANGIT register and is
also reset entering in its dedicated interrupt handler.
When the CAN node is in transmission and detects a Form Error in its frame, a bit Error
will also be raised. Consequently, two consecutive interrupts can occur, both due to the
same error.
When a MOb error occurs and is set in its own CANSTMOB register, no general error is
set in CANGIT register.
244 AT90CAN128
4250E–CAN–12/04