MEGA128CAN Datasheet, PDF (301/413 Pages) ATMEL Corporation – Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER

4250E–CAN–12/04
AT90CAN128
Table 111. Boundary-scan Signals for the ADC⁽¹⁾ (Continued)
Signal
Name
Direction
as Seen
from the
ADC
Description
Recommen-
ded Input
when not
in Use
Output Values when
Recommended Inputs
are Used, and CPU is
not Using the ADC
ADHSM
Input
Increases speed of
0
0
comparator at the
sacrifice of higher
power consumption
ADCBGEN Input
Enable Band-gap
0
0
reference as negative
input to comparator
ADCEN
Input
Power-on signal to the
0
0
ADC
AMPEN
Input
Power-on signal to the
0
0
gain stages
DAC_9
Input
Bit 9 of digital value to
1
1
DAC
DAC_8
Input
Bit 8 of digital value to
0
0
DAC
DAC_7
Input
Bit 7 of digital value to
0
0
DAC
DAC_6
Input
Bit 6 of digital value to
0
0
DAC
DAC_5
Input
Bit 5 of digital value to
0
0
DAC
DAC_4
Input
Bit 4 of digital value to
0
0
DAC
DAC_3
Input
Bit 3 of digital value to
0
0
DAC
DAC_2
Input
Bit 2 of digital value to
0
0
DAC
DAC_1
Input
Bit 1 of digital value to
0
0
DAC
DAC_0
Input
Bit 0 of digital value to
0
0
DAC
EXTCH
Input
Connect ADC
1
1
channels 0 - 3 to by-
pass path around gain
stages
G10
Input
Enable 10x gain
0
0
G20
Input
Enable 20x gain
0
0
GNDEN
Input
Ground the negative
0
0
input to comparator
when true
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